Voltage Controlled Oscillator

In most cases, the frequency of an oscillator is determined by the time constant RC. However, in cases or applications such as FM, tone generators, and frequency-shift keying (FSK), the frequency is to be controlled by means of an input voltage, called the control voltage. This can be achieved in a voltage-controlled oscillator (VCO). A VCO is a circuit that provides an oscillating output signal (typically of square-wave or triangular waveform) whose frequency can be adjusted over a range by a dc voltage.

Voltage Controlled Oscillator Block Diagram :

An example of a VCO is the 566 IC unit, that provides simultaneously the square-wave and triangular-wave outputs as a function of input voltage. The frequency of oscillation is set by an external resistor R1 and a capacitor C1 and the voltage Vc applied to the control terminals. Figure shows that the 566 IC unit contains current sources to charge and discharge an external capacitor Cv at a rate set by an external resistor R1 and the modulating dc input voltage.

A Schmitt trigger circuit is employed to switch the current sources between charging and discharging the capacitor, and the triangular voltage produced across the capacitor and square-wave from the Schmitt trigger are provided as outputs through buffer amplifiers. Both the output waveforms are buffered so that the output impedance of each is 50 f2. The typical magnitude of the triangular wave and the square wave are 2.4 Vpeak.to-peak and 5.4Vpeak.to.peak.

The frequency of the output waveforms is approximated by : fout = 2(V+ - Vc)/R1C1V+

Voltage Controlled Oscillator Circuit Diagram :

Figure shows the pin connection of the 566 unit. The VCO can be programmed over a 10-to-l frequency range by proper selection of an external resistor and capacitor, and then modulated over a 10-to-l frequency range by a control voltage, Vc The voltage controlled oscillators (VCOs) are commonly used in converting low-frequency signals such as EEG (electro-encephalograms) or ECG (electro-cardiograms) into an audio­frequency (AF range).

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Colpitts Oscillator

Colpitts oscillator is very similar to the shunt-fed Hartley oscillator. The principal difference is in the tank circuit. In the Colpitts oscillator, two capacitors are used as replacement coils are divided. Basic oscillator Feedback oscillator colpitts developed using the "electrostatic field" through the capacitor divider network.

Oscillator Colpitts

Colpitts oscillator frequency is determined by two capacitors connected in series and inductors. Voltage to the base provided by R1 and R2 while for emiitor given by R4. Collector voltage given back by connecting to the positive part of the VCC through R3. This resistor (R3) also functions as a collector load. Transistor is connected with the emitter-joint configuration. When the DC power supplied to the circuit, current flows from the negative part of V CC through R4, Q1 and R3. IC currents flowing through R3 causes a decrease in the voltage VC with a positive price. Voltage changes to negative direction are supplied to the top of the C1 through C3. The lower part of C2 positively charged and the voltage flowing to the base voltage so that the IB price rises.

Transistors Q 1 will increasingly berkonduksi until the saturation point. When Q 1 to the saturation point there was no increase in IC and VC changes will also be halted. There is no feedback to the C2. Magnetic fields C1 and C2 will be disarmed through the L1 and the subsequent magnetic field around it will disappear. Emptying flow persists for a moment. C2-chip bottom becomes negatively charged and pieces of the upper positively charged C1. This will reduce the forward voltage of Q 1 and the IC will be decrease. Price V C will begin to rise. This increase will be fed back to the top of the chip C1 through C3. C1 will charge more positive and the bottom of the C2 becomes more negative.

This process continues until Q 1 to the cutoff point. When Q 1 to the cutoff point, no current I C. No feedback voltage to the C1. Combined charge collected on the C1 and C2 stripped through L1. Currents flowing from the bottom of disarmament to the top of C1 C2. C2 negative charge will eventually run out and the magnetic field around L1akan disappeared. Currents that flow continues. C2 puck into the lower positive charge and the chips C1 upper negative charge. Positive voltage on C2 interesting Q 1 of the cutoff region. Furthermore, the IC will begin to flow again and the process starts again from this point.

Feedback energy is added to the tank circuit for a moment on any changes. The amount of feedback on Colpitts oscillator circuit is determined by the "ratio

capacitance "C1 and C2. The price of C1 in this circuit is much smaller than the C2 or C1 X> X C2. The voltage on C1 is greater than C2. By creating a smaller C2 would obtain feedback voltage is greater. But by raising the feedback too high will cause distortion. Usually around 10-50%, the collector voltage is returned to the tank circuit as a feedback.

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Simple MHz Oscillator using an ATtiny15

Most engineers will recognise the problem: Your schema needs a stable 1 or 2 MHz clock generator (in the author’s case it was for a Pong game using an old AY3-8500). A suitable crystal is not to hand so you cobble together an RC oscillator (there are plenty of diagram for such a design). Now it turns out that you don’t have exactly the right capacitor so a preset pot is add e d to allow some adjustment . Before you know it the clock schema is taking up more space on the board than you had hoped. 

Providing the application does not demand a precise clock source a tiny 8-pin microcontroller may offer a better solution to the problem. It needs no additional external components and an old ATtiny15 can be found quite cheaply. Another advantage of the solution is that clock frequency adjustment does not involve changing external components and is not subject to component tolerances. 

The microcontroller’s internal RC oscillator is already accurately calibrated to 1.6 MHz. With its inbuilt PLL, internal Timer 1 can achieve up to 25.6 MHz [2]. By configuring internal dividers the timer can output a frequency in range of roughly 50 kHz up to 12 MHz from an output pin. The difference between calculated and the actual output frequency increases at higher frequencies. A meaningful upper limit of about 2 MHz is a practical value and even at this frequency the deviation from the calculated value is about 15 %.

MHz Oscillator using an ATtiny15 Schematic

The schema diagram could hardly be simpler, aside from the power supply connections the output signal on pin 6 (PB1) is the only other connection necessary.The example program, written in Assembler is just 15 lines long! With a program this short comments are almost super fluous but are included for clarity. The code can be downloaded from the Elektor website [1]. 

The program only needs to initialise the timer which then runs independently of processor control to output the clock sign al . The processor can then be put into sleep mode to memory used up the remaining 99 % is free for use for other tasks if required. 

The OSCCAL register contains a calibration byte which allows some adjustment of the CPU clock. This gives a certain degree of fine tuning of the output frequency. A recommendation in the Atmel data sheet indicates that the CPU clock frequency should not be greater than 1.75 MHz otherwise timer operation cannot be guaranteed. 

The more recent ATtiny45 can be substituted for the ATtiny15. In this case the CK SEL fuses should be set to put the chip’s Timer 1 into ATtiny15- compatible mode [3]. After adjustment to the program it will now be possible to obtain a higher (or more exact) frequency from the timer, the ATtiny45’s PLL can operate up to 64 MHz.

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