Showing posts with label converter. Show all posts
Showing posts with label converter. Show all posts

Tuesday, November 18, 2014

10Mhz to 1 MHz Frequency Converter

10Mhz to 1 MHz Frequency Converter Circuit

10Mhz

Part ListIC1 7404 = 1
IC2 7490A = 1
R 1 K = 2
R 3.3 K = 1
C Trim Polymer 39 pF = 1
C Electrophoresis 4.7 uF 16V = 1
C Milar 47 nF 16 V = 1
C Milar 10 nF 16 V = 1
C Ceramic 68 pF 50 V = 1 

Wednesday, November 12, 2014

A serial to parallel converter using the AT89C2051

A
The example program included with the PG2051 evaluation kit is a basic serial to parallel converter written in 8051 assembler. This is probably a good example of the uses to which an AT89C2051 can be put - it would be hard to get a serial to parallel converter much simpler than the single 20 pin IC in this circuit. The program is meant to serve as a useful example of 8051 serial routines and other programming, whether or not you actually need a serial to parallel converter.


Source: http://airborn.com.au/serial/sertopar.html

Thursday, October 16, 2014

Simple Frequency to Vvoltage Converter Circuit Diagram

This is Simple Frequency to Vvoltage Converter Circuit Diagram. In these applications, a pulse input at % is differentiated by a C-R network and the negative-going edge at pin 6 causes the input comparator to trigger the timer circuit. Just as with a V-to-F converter, the average current flowing out of pin 1 is IaverAGE = i (1.1 RjC^ f. 

In this simple circuit, this current is filtered in the network RL = 100 k ohm and 1 µF. The ripple will be less than 10 mV peak, but the response will be slow, with a 0.1 second time constant, and settling of 0.7 second to 0.1%.



Simple Frequency to Vvoltage Converter Circuit Diagram

5V 2A Dc Converter Using LT3980

Using LT3980 manufactured by Linear Technology can be designed a very simple 5 volts dc converter circuit.

5V 2A Dc Converter Circuit Diagram



The LT3980 has an adjustable frequency from 100kHz to 2.4MHz and accepts input voltages up to 58V . The transient voltage of the LT3980 is around 80 volts . The maximum output current which can be delivered by the LT3980 monolithic buck switching regulator is around 2 Amps .

Main features of the LT3980 monolithic buck switching regulator are : wide input range from 3.6V to 58V , overvoltage lockout protects circuits through 80V transients , 2A Maximum Output Current , low ripple (<15mvp-p) burst mode, aadjustable switching frequency: 100khz to 2.4mhz ,low shutdown current: iq <1μa, thermal protection, soft-start capability 

Sunday, September 14, 2014

SW Converter for Digital AM Car Radio

SW Converter for Digital AM Car Radio Circuit Diagram This schema is purposely presented with many loose ends (not literally, of course) to stimulate experimenting with RF schemary at a small outlay. Looking at the schema diagram you may recognize a modified version of the SW Converter for AM Radios described elsewhere in this issue. The modifications were necessary to make the schema compatible with a digital rather than analogue AM car radio. The main difference between digital AM radios and their all-analogue predecessors is that tuning is in 9 kHz (some-times 4.5 kHz steps) in compliance with the international frequency allocation for the band. Obviously, that particular step size, desirable as it may be on MW, is a stumbling block if you want to use a digital AM receiver in combination with a frequency step-up converter for SW, where chaos reigns and there is no fixed step size. The first attempt was to make the crystal oscillator variable by about 5 kHz each way.
 
SW Converter for Digital AM Car Radio Circuit diagram :
SW
SW Converter for Digital AM Car Radio Circuit Diagram
 
Unfortunately, despite serious efforts, the crystal could not be pulled more than 1 or 2 kHz so another solution had to be found. After studying the NE/SA602/612 datasheet, it was found that a variable LC based oscillator was the best alternative. The schema worked after winding a resonant LC schema and adding a 0.1 µF series capacitor to block the DC component on pin 6 of the NE602 (612). When the tuning was found to be a bit sharp with the original capacitor, a simple bandspread (or fine tuning) feature was added by shunting the LC resonant schema with a lightly loaded 365 pF tuning capacitor (C10) which, like the main tuning counterpart, C8, was ratted from an old transistor radio. The tuning coil, L1, consists of 8 to 10 turns of 0.6-0.8mm dia. enamelled copper wire (ECW) on a 6-8 mm dia. former without a core. With this coil, frequency coverage will be from about 4 MHz to 12 MHz or so. Details on Tr1 may be found in the referring article.
 
Note that no tuning capacitor is used on the secondary — the input stray capacitance of the NE602 (612) does the trick. A BFO (beat frequency oscillator) was added to enable SSB (single sideband) signals to be received. The BFO built around T1 is simple, has a heap of output and is stable enough to hold an SSB signal for a few minutes without adjustment. The BFO frequency is tuned with C3. Tr2 is a ready-made 455 kHz IF transformer whose internal capacitor was first crushed and then removed with pliers. When S2 is closed the BFO output signal is simply superimposed on the NE602 (612) IF output to the MW radio. The converter should be built into a metal box for shielding. If you find that the BFO gives too much output, disconnect it as suggested in the schema diagram and let stray coupling do the work. Sensitivity, even on a 1-metre length of car radio aerial, is quite amazing. Bearing in mind that most of the major international SW broadcasting stations like Radio NHK Japan, Moscow, BBC etc.) generate enough power to make sure that you will hear them, it is still quite exciting to hear such signals for the first time on your car radio. 

Wednesday, September 3, 2014

Valve Sound Converter Wiring diagram Schematic

‘Valve sound’ is not just an anachronism: there are those who remain ardent lovers of the quality of sound produced by a valve amplifier. However, not everyone is inclined to splash out on an expensive valve output stage or complete amplifier with a comparatively low power output. Also, for all their aesthetic qualities, modern valve amplifiers burn up (in the full sense of the word!) quite a few watts even at normal listening volume, and so are not exactly environmentally harmless. This valve sound converter offers a cunning way out of this dilemma. It is a low cost unit that can be easily slipped into the audio chain at a suitable point and it only consumes a modest amount of energy.

Valve Sound Converter Circuit Diagram
 
Valve

A valve sound converter can be constructed using a common-or-garden small-signal amplifier using a readily-available triode. Compared to using a pentode, this simplifies the schema and, thanks to its less linear characteristic, offers even more valve sound. For stereo use a double triode is ideal. Because only a low gain is required, a type ECC82 (12AU7) is a better choice than alternatives such as the ECC81 (12AT7) or ECC83 (12AX7). This also makes things easier for home brewers only used to working with semiconductors, since we can avoid any difficulties with high voltages, obscure transformers and the like:the amplifier stage uses an anode voltage of only 60 V, which is generated using a small 24 V transformer and a voltage doubler (D3, D4, C4 and C5).
Since the double triode only draws about 2mA at this voltage, a 1 VA or 2 VA transformer will do the job. To avoid ripple on the power supply and hence the generation of hum in the converter, the anode voltage is regulated using Zener diodes D1 and D2, and T1. The same goes for the heater supply: rather than using AC, here we use a DC supply, regulated by IC1. The 9 V transformer needs to be rated at at least 3 VA. As you will see, the actual amplifier schema is shown only once. Components C1 to C3, R1 to R4, and P1 need to be duplicated for the second channel.
Valve

The inset valve symbol in the schema diagram and the base pinout diagram show how the anode, cathode and grid of the other half of the double triode (V1.B) are connected. Construction should not present any great difficulties. Pay particular attention to screening and cable routing, and to the placing of the transformers to minimise the hum induced by their magnetic fields. Adjust P1 to set the overall gain to 1 (0 dB). The output impedance of 47 kΩ is relatively high, but should be compatible with the inputs of most power amplifiers and preamplifiers.

For a good valve sound, the operating point of the schema should be set so that the audio output voltage is in the region of a few hundred millivolts up to around 1.5 V. If the valve sound converter is inserted between a preamplifier and the power amplifier, it should be before the volume control potentiometer as otherwise the sound will change significantly depending on the volume. As an example, no modifications are needed to an existing power amplifier if the converter is inserted between the output of a CD player and the input to the amplifier.



Sunday, August 31, 2014

How to Build a Photodiode current to voltage converter

The Photodiode current-to-voltage converter schema uses three CA3130 BiMOS op amps in an application sensitive to sub-picoampere input currents. The schema provides a ground-referenced output voltage proportional to input current flowing through the photo-diode.

 Photodiode current-to-voltage converter schema


Thursday, August 28, 2014

Build a Regulated driven Converter Wiring diagram Schematic

How to Build a Regulated driven Converter Circuit Diagram?.This converter delivers up to 50 mA from a 6-V battery with 78% efficiency. This flyback converter functions by feedback-controlling the frequency of inductive flyback events. The inductor`s output, rectified and filtered to de, biases the feedback loop to establish a stable output. If the converter`s output is below the loop setpoint, A2`s inputs unbalance and current is fed through the 1-MO resistor at Al. This ramps the 1000-pF value positive. When this ramp exceeds the 0.5-V potential at A1 `s positive input, the amplifier switches high. 

 Regulated driven Converter Circuit Diagram

Regulated


Q2 turns on, discharging the capacitor to ground. Simultaneously, regenerative feedback through the 200-pF value causes a positive-going pulse at A1`s positive input, sustainlljg A1`s positive output. Q1 comes on, allowing inductor, 11, current to flow. When A1`s feedback pulse decays, its output becomes low, turning off Ql. Q1`s collector is pulled high by the inductor`s flyback and the energy is stored in the 100-I`F capacitor. The capacitor`s voltage, which is the schema output, is sampled by A2 to close a loop around Al/Ql. This loop forces A1 to oscillate at whatever frequency is required to maintain the 15-V output. 

In-phase transformer windings for the drain and gate of TMOS power FET Q1 cause the schema to oscillate. Oscillation starts when the feedback coupling capacitor, C1, is charged from the supply line via a large resistance; R2 and R3 limit the collector current to Q2. During pump-up, the on time is terminated by Q2, which senses the ramped source current of Ql. C1 is charged on alternate half-cycles by Q2 and forward-biased by zener D2. 

When the regulated level is reached, forward bias is applied to Q2, terminating the on time earlier at a lower peak current. When this occurs, the frequency increases in inverse proportion to current, but the energy per cycle decreases in proportion to current squared. Therefore, the total power coupled through the transformer to the secondary is decreased.

Wednesday, August 27, 2014

Simple Period To Voltage Converter Wiring diagram Schematic

This is a Simple Period-To-Voltage Converter Circuit Diagram. The schema input signal drives ICD. Because ICD`s positive input (V+) is slightly offset to + 0.1 V, its steady state output will be around +13 V. This voltage is sent to ICC through D2, setting ICC`s output to +13 V. Therefore, point D is cut off by Dl, and CI is charged by the current source. 

Assuming the initial voltage on CI is zero, the maximum voltage (^Cinax) is given by: When the input goes from low to high, a narrow positive pulse is generated at point A. This pulse becomes -13 V at point B, which cuts off D2. ICC`s V+ voltage becomes zero. The charge on CI will be absorbed by ICC on in a short time. 

The time constant of C2 and R5 determines the discharge period— about 10 /is. ICB is a buffer whose gain is equal to (R& + R9)~Rg = lM5. ICD`s average voltage will be (1362f 1.545) + 2 = 1052/. RIO and C3 smooth the sawtooth waveform to a dc output.

Simple Period-To-Voltage Converter Circuit Diagram

Simple